Cypress Semiconductor and Xilinx Inc. announced the collaborative co-development of reference designs for next-generation communications and memory products. The first product resulting from the newly formed relationship between Cypress and Xilinx through the Xilinx Reference Design Alliance Program is a reference design for implementing a complete "Fiber-to-Fiber" data over SONET/SDH solution. Further designs targeting packet-processing applications are currently in development by the two companies.

The design--which uses transparent generic framing procedure (GFP-T) for data encapsulation and virtual concatenation for optimal bandwidth utilization--deploys two client channels over SONET, each independently configurable for multi-protocol standards, including any combination of Gigabit Ethernet (GbE), Fibre Channel, Enterprise Systems Connection (ESCON), and Fibre Connectivity (FICON).

By leveraging Cypress's MetroLink2T-2 core to implement GFP-T functions, the reference design is optimized for the Xilinx Virtex-II FPGA. Cypress's MetroLink core is the first Link Layer Device (LLD) on the market to offer GFP-T. The Virtex-II device uses flexible SelectI/O-Ultra technology to seamlessly interface to Cypress's POSIC2GVC SONET/SDH framer and HOTLink II serializer/deserializer (SERDES).